This invention relates to digital IF downconversion and particularly to digital IF downconversion of relatively wide bandwidth signals at microwave frequencies.
Digital IF downconversion has the advantage of flexibility for multi-mode operation, such as is useful for multiple modes of cellular communication and controllable accuracy and thus good performance with wide bandwidth signals wherever the sampling rate and coefficient accuracy is adequate for the frequencies of interest. In typical operation, the full bandwidth range is captured in an analog-to-digital converter employing a bandpass sigma-delta converter, followed by a final digital filtering channel.
The challenge of processing a wideband digital IF converted signal is rejection of unwanted image and spurious signals which when they occur on the frequency of interest block the desired signal (and hence are called blockers). For this purpose, a DSP filter that is programmed for the appropriate mode of operation is commonly used following wideband downconversion.
FIG. 1 illustrates one typical configuration of a downconverter circuit 100 with an image reject stage. Radio Frequency (RF) signals are processed through an in-phase (I) channel 102 and a quadrature phase channel 104 implemented by downconverting mixers 106 and 108 referenced to an analog reference signal of an analog source 110, wherein the reference signals are precisely 90 degrees out of phase (as represented by a 90 degree or π/2 delay element 112). The reference signal has a typical operating frequency of 100 kHz below the nominal RF frequency. The analog signals are processed through conventional sigma-delta analog to digital converters 114, 116 to produce respective one-bit wide serial bit streams. Each channel of the circuit 100 includes a decimator 118, 120 to convert the high-speed serial bit streams to parallel bit streams. There are typically four or eight parallel streams in each path. The parallel bit streams are each supplied to respective fractional filters to make the sampling integer in nature. There is a corresponding compensation filter function for extracting the desired signal of the defined bandwidth. These two functions may be combined in a digital finite impulse response (FIR) filter 122, 124 whose characteristics are defined by a set of filter coefficients.
It is known that out-of-bandwidth attenuation degrades as fewer bits are used to represent filter coefficients. Thus, overall performance depends on the number of bits employed to represent the filter characteristic. The outputs of the FIR filters 122, 124 are mixed and summed digitally in a mixing/summing stage 126 to cancel the unwanted components and to generate as output I and Q multi-bit digital bit streams representing the pure I component and the pure Q component of the wanted signal with maximum image rejection. The digital I and Q components are then processed through digital-to-analog converters 128, 130 (operating at the Nyquist rate) to recover the signal as I and Q analog components 132, 134 at baseband.
This conventional image cancellation scheme has a number of practical drawbacks. According to the conventional approach, in order to achieve targeted performance levels, it has been a practice to use relatively power-consumptive parallel processing techniques operative on the in-phase and quadrature signal components in the form of digital word streams. Not only do these techniques consume more power than is desirable, they also require deployment of relatively large integrated circuits. In a typical configuration, the decimators 118, 120, FIR filter 122, 124, the summing stage 126 and the DACs 128, 130 require on the order of 25,000 gates to implement, which translates to almost 3 square millimeters of valuable circuit area and relatively high power consumption. Both power and circuit size are premium in a portable battery operated digital device such as a cellular telephone.
A representative description of one published prior art implementation is Rudell et al., “A 1.9 GHz Wide-Band IF Double Conversion CMOS Receiver for Cordless Telephone Applications,” IEEE Journal of Solid-State Circuits, Vol. 32, No. 12, December 1997.
Another representative reference is Canadian patent application 2,284,948 published Apr. 4, 2001 of Birkett et al.
What is needed is a more efficient image reject circuit in a digital IF downconversion circuit for a portable digital device such as a cellular telephone.